1. Field of the Invention
The invention relates to a MOSFET device that is a semiconductor circuit including a strained SiMOSFET, and in particular, to a strained SOI MOSFET device using SiGe, and a method of fabricating the same.
2. Description of the Related Art
Improvement in the performance of a MOSFET is generally attained by miniaturization of a gate length. However, if the gate length is reduced to 0.1 μm or less, this will result in pronounced deterioration in mobility of current carriers, that is, electrons (or holes), due to enlargement of a perpendicular electric field created in the channel region of the MOSFET. Accordingly, a strained SiMOSFET (refer to IEEE Trans. Electron Devices, Vol. 47, No. 7, 2000, pp 1406-1415) capable of aiming at higher performance without depending solely on the miniaturization of the gate length has come to attract a lot of attention of the related industries as a LSI technology for the next generation. There has also been proposed a SOI strained SiMOSFET (refer to IEEE Electron Device Letters, Vol.21, No. 5, 2000, pp 230-232) aiming at improvement in driving force by reducing junction capacitance occurring at interfaces between highly doped diffusion layers and an Si substrate.
However, an SiGe layer formed underneath a strained Si layer, serving as the channel region of a strained SiMOSFET, has a very low thermal conductivity. For example, the SiGe layer, containing 20% of Ge in concentration, has a thermal conductivity on the order of one-fifteenth the thermal conductivity of the Si layer. Accordingly, in a state where the drain current of a transistor flows in large quantity, heat generated in the channel region as a result of self-heating is difficult to be diffused into the SiGe layer, so that there occurs an increase in resistance due to rise in the temperature of the channel region, thereby resulting in deterioration of the driving force of the strained SiMOSFET.
As is apparent from the drain current ID—drain voltage VD characteristics of a MOSFET, schematically shown in FIG. 21, in the case of a structure or an operational condition, having a small self-heating effect (for example, in the case of the gate length being long, a gate width being narrow, or a power supply voltage being sufficiently low), a strained SiMOSFET (with the characteristics thereof as indicated by solid lines in FIG. 21) can obtain a large drain current as compared with a common MOSFET (with the characteristics thereof as indicated by broken lines in FIG. 21). In contrast, as is apparent from the drain current ID—drain voltage VD characteristics of a MOSFET, schematically shown in FIG. 22, in the case of a structure or an operational condition, having a large self-heating effect (for example, in the case of the gate length being short and the width being not less than several μm, or the power supply voltage being high), a strained SiMOSFET (with the characteristics thereof as indicated by solid lines in FIG. 22) can obtain drain current only equivalent to, or not more than that for the common MOSFET (with the characteristics thereof as indicated by broken lines in FIG. 22).
With LSIs, by providing a step-down circuit, and so forth, internally, in recent years, a low voltage low current operation is executed in high-speed processing parts (core regions), however, a high power supply voltage as well as flow of a large drain current is required in data input-output parts (interface regions or I/O regions) so as to match requirements of peripheral equipment. For this reason, in the case of forming a LSI using a strained SiMOSFET, it is anticipated that the performance (data processing speed) of the LSI cannot be fully enhanced due to insufficient driving force in the I/O regions although the driving force of the core regions is enhanced.